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  rev.3.00, apr.01.2 004, page 1 of 6 HAT2195R silicon n channel power mos fet power switching rej03g0060-0300z rev.3.00 apr.01.2004 features ? high speed switching ? capable of 4.5 v gate drive ? low drive current ? high density mounting ? low on-resistance r ds(on) = 4.6 m ? typ. (at v gs = 10 v) outline sop-8 1 2 3 4 5 6 7 8 1, 2, 3 source 4 gate 5, 6, 7, 8 drain g d sss d dd 4 1 23 56 7 8 absolute maximum ratings (ta = 25c) item symbol ratings unit drain to source voltage v dss 30 v gate to source voltage v gss 20 v drain current i d 18 a drain peak current i d(pulse) note1 144 a body-drain diode reverse drain current i dr 18 a avalanche current i ap note 2 18 a avalanche energy e ar note 2 32.4 mj channel dissipation pch note3 2.5 w channel to ambient thermal impedance ch-a note3 50 c/w channel temperature tch 150 c storage temperature tstg ?55 to +150 c notes: 1. pw 10 s, duty cycle 1% 2. value at tch = 25 c, rg 50 ? 3. when using the glass epoxy boar d (fr4 40 x 40 x 1.6 mm), pw 10s
HAT2195R rev.3.00, apr.01.20 04, page 2 of 6 electrical characteristics (ta = 25c) item symbol min typ max unit test conditions drain to source breakdown voltage v (br)dss 30 ? ? v i d = 10 ma, v gs = 0 gate to source leak current i gss ?? 0.1 av gs = 20 v, v ds = 0 zero gate voltage drain current i dss ??1 av ds = 30 v, v gs = 0 gate to source cutoff voltage v gs(off) 1.0 ? 2.5 v v ds = 10 v, i d = 1 ma static drain to source on state r ds(on) ?4.65.8m ? i d = 9 a, v gs = 10 v note4 resistance r ds(on) ?5.88.4m ? i d = 9 a, v gs = 4.5 v note4 forward transfer admittance |y fs |25 42 ? s i d = 9 a, v ds = 10 v note4 input capacitance ciss ? 3400 ? pf v ds = 10 v output capacitance coss ? 785 ? pf v gs = 0 reverse transfer capacitance crss ? 250 ? pf f = 1 mhz gate resistance rg ? 1.0 ? ? total gate charge qg ? 23 ? nc v dd = 10 v gate to source charge qgs ? 10 ? nc v gs = 4.5 v gate to drain charge qgd ? 5.5 ? nc i d = 18 a turn-on delay time t d(on) ?12?nsv gs = 10 v, i d = 9 a rise time t r ?16?nsv dd ? 10 v turn-off delay time t d(off) ?50?nsr l = 1.11 ? fall time t f ? 6.5 ? ns rg = 4.7 ? body?drain diode forward voltage v df ? 0.80 1.04 v if = 18 a, v gs = 0 note4 body?drain diode reverse recovery time t rr ?32?ns if = 18 a, v gs = 0 dif/ dt = 100 a/ s notes: 4. pulse test main characteristics channel dissipation pch (w) ambient temperature ta (c) power vs. temperature derating drain to source voltage v ds (v) drain current i d (a) maximum safe operation area note 5 : when using the glass epoxy board (fr4 40x40x1.6 mm) 4.0 3.0 2.0 1.0 0 50 100 150 200 100 10 1 0.1 0.01 0.1 0.3 1 3 10 30 100 test condition : when using the glass epoxy board (fr4 40x40x1.6 mm), pw < 10 s 500 ta = 25 c 1 shot pulse pw = 10 ms 10 s 100 s operation in this area is limited by r ds(on) note 5 dc operation (p w < 10 s) 1 ms
HAT2195R rev.3.00, apr.01.20 04, page 3 of 6 gate to source voltage v gs (v) drain to source voltage v ds(on) (mv) drain to source saturation voltage vs. gate to source voltage drain current i d (a) drain to source on state resistance r ds(on) (m ? ) static drain to source on state resistance vs. drain current case temperature tc (c) drain to source on state resistance r ds(on) (m ? ) static drain to source on state resistance vs. temperature forward transfer admittance |yfs| (s) drain current i d (a) forward transfer admittance vs. drain current 200 160 120 80 40 0 4 8 12 16 20 20 10 2 5 1 30 300 12 10 8 6 4 ?25 0 25 50 75 150 100 125 2 pulse test i d = 20 a 5 a 10 a 1 10 100 1000 3 100 50 v gs = 4.5 v 10 v pulse test 5 a, 10 a 20 a i d = 5 a, 10 a, 20 a v gs = 4.5 v 10 v pulse test 330 0.1 1 10 100 0.3 10 1000 30 100 300 1 0.3 3 0.1 tc = ?25 c v ds = 10 v pulse test 75 c 25 c drain to source voltage v ds (v) drain current i d (a) typical output characteristics gate to source voltage v gs (v) drain current i d (a) typical transfer characteristics 50 40 30 20 10 0 246810 50 40 30 20 10 0 1234 5 tc = 75c 25c ?25c v = 10 v pulse test ds v gs = 2.4 v 10 v 4 v 2.6 v 2.8 v pulse test
HAT2195R rev.3.00, apr.01.20 04, page 4 of 6 reverse drain current i dr (a) reverse recovery time trr (ns) body drain diode reverse recovery time capacitance c (pf) drain to source voltage v ds (v) typical capacitance vs. drain to source voltage drain current i d (a) switching time t (ns) switching characteristics 0.3 1 3 10 100 30 100 20 50 10 010 25 15 20 530 10000 3000 1000 300 100 30 10 ciss coss crss v gs = 0 f = 1 mhz 300 30 100 10 1 3 0.1 di/dt = 100 a/ s v gs = 0, ta = 25 c 0.3 1 3 10 100 30 0.1 v gs = 10 v, v ds = 10 v rg = 4.7 ? , duty < 1 % 50 40 30 20 10 0 20 16 12 8 4 20 40 60 80 100 0 i d = 18 a v gs v ds v dd = 25 v 10 v 5 v v dd = 25 v 10 v 5 v gate charge qg (nc) drain to source voltage v ds (v) gate to source voltage v gs (v) dynamic input characteristics 1000 t f t r t d(off) t d(on) source to drain voltage v sd (v) reverse drain current i dr (a) 50 40 30 20 10 0 0.4 0.8 1.2 1.6 2.0 reverse drain current vs. source to drain voltage pulse test 5 v v gs = ?5.0 v 10 v 50 40 30 20 10 25 50 75 100 125 150 0 channel temperature tch (c) repetitive avalanche energy e ar (mj) maximum avalanche energy vs. channel temperature derating i ap = 18 a v dd = 15 v duty < 0.1 % rg > 50 ?
HAT2195R rev.3.00, apr.01.20 04, page 5 of 6 pulse width pw (s) normalized transient thermal impedance vs. pulse width normalized transient thermal impedance s (t) 10 100 1 m 10 m 100 m 1 10 100 1000 10000 10 1 0.1 0.01 0.001 0.0001 d = 1 0.5 0.2 0.1 0.05 0.02 0.01 1shot pulse dm p pw t d = pw t ch - f(t) = s (t) x ch - f ch - f = 83.3c/w, ta = 25c when using the glass epoxy board (fr4 40x40x1.6 mm) vin monitor d.u.t. vin 10 v r l v ds = 10 v tr td(on) vin 90% 90% 10% 10% vout td(off) vout monitor 90% 10% t f switching time test circuit switching time waveform rg d. u. t rg i monitor ap v ds monitor v dd 50 ? vin 15 v 0 i d v ds i ap v (br)dss l v dd e ar = l ? i ap 2 ? 2 1 v dss v dss ? v dd avalanche test circuit avalanche waveform
HAT2195R rev.3.00, apr.01.20 04, page 6 of 6 package dimensions package code jedec jeita mass (reference value) fp-8da conforms ? 0.085 g *dimension including the plating thickness base material dimension 1.75 max 4.90 0.25 0.15 0? ? 8? m 8 5 1 4 1.27 3.95 0.40 0.06 *0.42 0.08 5.3 max 0.75 max 0.14 + 0.11 ? 0.04 0.20 0.03 *0.22 0.03 0.60 + 0.67 ? 0.20 6.10 + 0.10 ? 0.30 1.08 as of january, 2003 unit: mm ordering information part name quantity shipping container HAT2195R-el-e 2500pcs taping note: for some grades, production may be terminated. please contact the renesas sales office to check the state of production before ordering the product.
keep safety first in your circuit designs! 1. renesas technology corp. puts the maximum effort into making semiconductor products better and more reliable, but there is a lways the possibility that trouble may occur with them. trouble with semiconductors may lead to personal injury, fire or property damage. remember to give due consideration to safety when making your circuit designs, with appropriate measures such as (i) placeme nt of substitutive, auxiliary circuits, (ii) use of nonflammable material or (iii) prevention against any malfunction or mishap. notes regarding these materials 1. these materials are intended as a reference to assist our customers in the selection of the renesas technology corp. product best suited to the customer's application; they do not convey any license under any intellectual property rights, or any other rights, belonging to renesas t echnology corp. or a third party. 2. renesas technology corp. assumes no responsibility for any damage, or infringement of any third-party's rights, originating in the use of any product data, diagrams, charts, programs, algorithms, or circuit application examples contained in these materials. 3. all information contained in these materials, including product data, diagrams, charts, programs and algorithms represents i nformation on products at the time of publication of these materials, and are subject to change by renesas technology corp. without notice due to product improvement s or other reasons. it is therefore recommended that customers contact renesas technology corp. or an authorized renesas technology corp. product distrib utor for the latest product information before purchasing a product listed herein. the information described here may contain technical inaccuracies or typographical errors. renesas technology corp. assumes no responsibility for any damage, liability, or other loss rising from these inaccuracies o r errors. please also pay attention to information published by renesas technology corp. by various means, including the renesas techn ology corp. semiconductor home page (http://www.renesas.com). 4. when using any or all of the information contained in these materials, including product data, diagrams, charts, programs, a nd algorithms, please be sure to evaluate all information as a total system before making a final decision on the applicability of the information and products. renesas technology corp. assumes no responsibility for any damage, liability or other loss resulting from the information contained herein. 5. renesas technology corp. semiconductors are not designed or manufactured for use in a device or system that is used under ci rcumstances in which human life is potentially at stake. please contact renesas technology corp. or an authorized renesas technology corp. product distributor when considering the use of a product contained herein for any specific purposes, such as apparatus or systems for transportation, vehicular, medical, aerosp ace, nuclear, or undersea repeater use. 6. the prior written approval of renesas technology corp. is necessary to reprint or reproduce in whole or in part these materi als. 7. if these products or technologies are subject to the japanese export control restrictions, they must be exported under a lic ense from the japanese government and cannot be imported into a country other than the approved destination. any diversion or reexport contrary to the export control laws and regulations of japan and/or the country of destination is prohibited. 8. please contact renesas technology corp. for further details on these materials or the products contained therein. sales strategic planning div. nippon bldg., 2-6-2, ohte-machi, chiyoda-ku, tokyo 100-0004, japan http://www.renesas.co m renesas technology america, inc. 450 holger way, san jose, ca 95134-1368, u.s.a tel: <1> (408) 382-7500 fax: <1> (408) 382-7501 renesas technology europe limited. dukes meadow, millboard road, bourne end, buckinghamshire, sl8 5fh, united kingdom tel: <44> (1628) 585 100, fax: <44> (1628) 585 900 renesas technology europe gmbh dornacher str. 3, d-85622 feldkirchen, germany tel: <49> (89) 380 70 0, fax: <49> (89) 929 30 11 renesas technology hong kong ltd. 7/f., north tower, world finance centre, harbour city, canton road, hong kong tel: <852> 2265-6688, fax: <852> 2375-6836 renesas technology taiwan co., ltd. fl 10, #99, fu-hsing n. rd., taipei, taiwan tel: <886> (2) 2715-2888, fax: <886> (2) 2713-2999 renesas technology (shanghai) co., ltd. 26/f., ruijin building, no.205 maoming road (s), shanghai 200020, china tel: <86> (21) 6472-1001, fax: <86> (21) 6415-2952 renesas technology singapore pte. ltd. 1, harbour front avenue, #06-10, keppel bay tower, singapore 098632 tel: <65> 6213-0200, fax: <65> 6278-8001 renesas sales offices ? 2004. renesas technology corp., all rights reserved. printed in japan. c olophon .1 .0


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